Our research addresses the security problems in hardware design by developing novel design-automation algorithms and circuit techniques to ensure the trustworthiness of computers with provable security guarantees. The broad goals of our research are to address the general problem of hardware security more holistically. By empowering hardware with security techniques, our research has been: (i) transferring control over a hardware design back to the fabless chip designers, who had relinquished their control to reduce manufacturing cost by outsourcing; (ii) ensuring the trustworthiness and security of electronic components; (iii) successfully combating the rogue elements as they intrude into the supply chain; (iv) developing tools and techniques to enforce the security of hardware; (v) exposing the security capabilities of emerging technologies; (vi) detecting and patching security vulnerabilities in System-on-Chips (SoCs).
To this end, we are working on:
i) Supply-chain security: Logic locking, Split manufacturing and Camouflaging
ii) Security of System-on-Chips: Hardware Fuzzing, Hack@Event, and HardFails
We are recruiting!
If you are a Texas A&M student (graduate or undergraduate) and are interested in our research, please reach out to us by sending your CV to jv.rajendran@tamu.edu.